This book presents a new inverter phase-leg configuration that is inherently immune to shoot- through failures, eliminating one of the most serious failure modes in the conventional phase-leg configuration. The augmented phase-leg configuration (APLC) requires a single command signal and a simplified gate drive configuration to control the phase leg operation. The APLC also provides a significant advantage of eliminating the need for introducing dead-time intervals in the control of standard inverter phase legs. Very low levels of both harmonic distortion and nonlinearity are demonstrated using this new phase-leg configuration, making it attractive for many motor drive applications including low-frequency sensorless vector control, flux estimation, and open- loop voltage control. An alternative APLC topology is presented using a synchronous rectifier MOSFET that offers reduced losses by decreasing the forward conduction drop of the series diode. The results of this book provide valuable techniques and tools for developing new integrated power electronic modules that are highly integrated, intelligent, and robust.