☰ Category

Approaches for Hardware Fault Mitigation in Multicore Processors


Marketed By :  LAP LAMBERT Academic Publishing   Sold By :  Kamal Books International  
Delivery in :  10-12 Business Days


Check Your Delivery Options

Product Out of Stock Subscription

(Notify me when this product is back in stock)

Rs. 5,066

Availability: Out of stock

  • Product Description

This thesis addresses one of the fundamental challenges emerging in microprocessor design, namely hardware reliability and resilience. Since inception in the 70's, microprocessors have primarily benefited from technological advancements in semiconductors fabrication allowing for an exponential increase in computing capability of chips by shrinking transistors sizes. Unfortunately, forecasts indicate that further shrinking in size will be accompanied by variability in transistor performance and reliability. This thesis proposes novel designs and enhancements to provide hardware reliability for parallel workloads. In particular, it is provided noteworthy improvements in Redundant Multi Threading (RMT) fault-tolerant approaches, as well as novel Expected Miss Ratio (EMR) model to determine the impact of hard faults on cache memories.

Product Specifications
SKU :COC82257
AuthorDaniel Sánchez
Number of Pages192
Publishing Year2011-11-21T00:00:00.000
Edition1 st
Book TypeElectronics & communications engineering
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-10-08 00:00:00
0 Review(s)