Design Methodology for highly Reliable Digital ASIC Designs

Design Methodology for highly Reliable Digital ASIC Designs


Marketed By :  LAP LAMBERT Academic Publishing   Sold By :  Kamal Books International  
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  • Product Description

In spite of the huge research efforts and respectable scientific achievements, there are still challenges regarding the use of commercial ASIC technologies in space and safety-critical applications. The most important challenges are: 1. Radiation-hardened technologies are expensive (qualification and quality requirements are severe) and commercially not attractive (small volume production). 2. There is no standard integrated framework of circuit design techniques that provides simultaneous SEU, SET, and SEL fault-tolerance. 3. There is no standard design automation flow for fault-tolerant digital ASICs and SOCs. This book presents a design methodology for fault-tolerant ASIC that is based on redundant circuits with latchup protection and additional implementation steps during logic synthesis and layout generation. The proposed design approach provides the ASICs immune to the upsets, transients, and latchup faults by combining and integrating different fault-tolerant techniques in a carefully designed procedure.

Product Specifications
SKU :COC79222
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-10-08
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