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Design Space Exploration of Network-on-Chip at System level

 

Marketed By :  LAP LAMBERT Academic Publishing   Sold By :  Kamal Books International  
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Rs. 4,396

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  • Product Description
 

About the Book: The goal of this text is to help students, researchers and academicians, who are working in the field of CAD for VLSI. Network-on-Chip(NoC) has been recently developed as an on-chip communication solution for System-on-Chip(SoC) design. This paradigm supports various communication resources at a time and overcomes the limitations of bus-based System. Design space exploration methodology at system level reduces the time-to-market pressure of the large and complex systems. On the other hand, design space exploration at system level is a combinatorial optimization problem. So, multi-objective Genetic Algorithm has been considered as an optimization tool for the design space exploration task. This book provides detailed methodology/algorithms to explore the design space of NoC at System Level using Genetic Algorithm. This book is the outcome of my PhD work. I hope this book will help all stake holders for extensive research in the field of NoC at System level.

Product Specifications
SKU :COC17404
AuthorRabindra Kumar Jena
LanguageEnglish
BindingPaperback
Number of Pages160
Publishing Year2012-11-01T00:00:00.000
ISBN978-3847320050
Edition1 st
Book TypeComputing & information technology
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-07-26 00:00:00