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Energy Recovery Clocking Scheme to Achieve Ultra Low-Power

 

Marketed By :  LAP LAMBERT Academic Publishing   Sold By :  Kamal Books International  
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  • Product Description
 

As the scale of integration improves and technolgy shrinks, the more number of transistors are being packed into a chip that increases the density of the chip. This leads to the steady growth in the operating frequency and possesing capacity per chip, resulting in increased power dissipation. In modern VLSI systems, the clock is the most important signal because it controls the rate of data processing and communication. It provides a structured framework for dealing with high-complexity digital systems. Various survey and current research indicates that clock network consumes a large part of the total chip power. It is even much more than that of the ordinary logic used in the design. This book indicates the four novel low power flip-flops collectively called novel energy recovery flip-flops to reduce the power dissipation in a clock network. The energy recovery clocked flip-flops enable energy recovery from the H-tree based clock network, resulting in significant energy saving. The energy recovery flip-flops operate with a single phase sinusoidal clock generated by an efficient power clock generator.

Product Specifications
SKU :COC56653
AuthorVinod Kumar Joshi
LanguageEnglish
BindingPaperback
Number of Pages100
Publishing Year2012-05-21T00:00:00.000
ISBN978-3659132711
Edition1 st
Book TypeElectronics & communications engineering
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-06-08 00:00:00
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