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FPGA Based Self-test Systems

 

Marketed By :  LAP LAMBERT Academic Publishing   Sold By :  Kamal Books International  
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  • Product Description
 

With I/O speeds increasing rapidly, there is a need to find efficient ways of designing hardware circuits to characterize and test these high speed interfaces. Traditionally, Bit Error Rate (BER) is evaluated using software simulations and stand-alone BER test products, which are either time-consuming or expensive. In this book, I demonstrate the design and implementation of a self-contained FPGA-based systems that can be used to test these interconnects. We present a user-configurable system that is capable of generating and evaluating the ITU-T recommended test patterns simultaneously over three channels with data rates of up to 3 Gb/s per channel. This includes the design of high-speed random pattern generator designs in Verilog and C-code for the integrated Power-PC processor to handle control of the user interface. The book also includes schematics of the current system and board design ideas for the readers to design their own systems.

Product Specifications
SKU :COC56846
AuthorManav Shah
LanguageEnglish
BindingPaperback
Number of Pages116
Publishing Year2012-11-10T00:00:00.000
ISBN978-3659273469
Edition1 st
Book TypeElectronics & communications engineering
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-06-08 00:00:00
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