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Hardware Implementation of Digital Satellite Receiver


Marketed By :  VDM Verlag Dr. Müller   Sold By :  Kamal Books International  
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Rs. 4,396

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  • Product Description

As continual research is being conducted in the area of Digital System Design and Digital Communication, one of the most practical applications under vigorous development is in the design and implementation of a high speed digital satellite receiver. While the problem of forward error correction at high data rates under gross variations remains somewhat unsolved, the present project is a vivid demonstration of efficient system design and algorithms in the field of high speed digital satellite receivers. A receiver system capable of reliable forward error correction of seven symbols, with reduced constraints in regards to high speed sampling and FPGA based hardware utilization has been implemented. The design of the digital receiver system consists of the various modules which implement the different successive steps in digital communication – a Digital Front End, Hilbert Transformer, Timing and Phase Recovery, and a Reed Solomon Decoder for forward error correction. These modules were tested on simulated input, and their synthesized hardware instances were then tested on the FPGA using a PC interface with ChipScope.

Product Specifications
SKU :COC38115
AuthorMuhammad Aitsam-ul-Haq Goraya,Shoaib Sial and S. Arshad
Number of Pages148
Publishing Year8/16/2010
Edition1 st
Book TypeElectronics & communications engineering
Country of ManufactureIndia
Product BrandVDM Verlag Dr. Müller
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-07-31 00:00:00