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Implementation of a Binary Floating Point Fused Multiply-Add Unit

 

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  • Product Description
 

The fused multiply add (FMA) operation is very important in many scientific and engineering applications. It is a key feature of the floating-point unit (FPU), which greatly increases the floating-point performance and accuracy.Many approaches are developed on floating-point fused multiply add unit to decrease its latency.two of these approaches are implemented in the Verilog hardware description language. ModelSim10.0c is a used to compile Verilog codes and to simulate them.

Product Specifications
SKU :COC56891
AuthorWalaa Abdel Aziz Ibrahim,Hossam Aly Fahmy and Ahmed Hussien Khalil
LanguageEnglish
BindingPaperback
Number of Pages104
Publishing Year2012-12-16T00:00:00.000
ISBN978-3846546215
Edition1 st
Book TypeElectronics & communications engineering
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-06-08 00:00:00
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