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Mathematical Layout of a Graph Embedding


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  • Product Description

An important feature of an interconnection network is its ability to efficiently simulate programs written for other architectures. Such a simulation problem can be mathematically formulated as graph embedding. Graph embedding is an important technique for studying the computational capabilities of processor interconnection networks and task distributions, which is a recent focus of research in the parallel processing area. The quality of an embedding can be measured by certain cost criteria, namely dilation and wire-length (layout). Dilation is the measure for the communication time needed when simulating one network on another. The layout of a graph embedding arises from the VLSI designs, biological models that deal with cloning and visual stimuli, parallel architecture and structural engineering. In this book we give the techniques to compute the layout of a graph embedding and apply this for certain well known interconnection networks such as circulant networks, hypercubes, folded hypercubes, grid networks and generalized Petersen graphs.

Product Specifications
SKU :COC67752
AuthorMicheal Arockiaraj and Indra Rajasingh
Number of Pages164
Publishing Year2013-03-13T00:00:00.000
Edition1 st
Book TypeMathematics
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-07-08 00:00:00
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