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Modeling and Evaluation of Networks on Chip

Modeling and Evaluation of Networks on Chip

 

Marketed By :  LAP LAMBERT Academic Publishing   Sold By :  Kamal Books International  
Delivery in :  10-12 Business Days

 
₹ 3,718

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  • Product Description
 

The current process technologies are able to integrate billions of transistors on a single chip and the density of integration is even increasing. To effectively utilize the continuous increase in on-chip area there is a trend towards integration of more and more processing elements e.g. general-purpose processors, DSPs, memories, ASICs, reconfigurable hardware and custom hardware onto a single chip. The continuous increasing demand in number of on-chip resources has lead the SoC researchers to design scalable, modular and efficient on-chip communication infrastructures known as networks on chip (NoC). Design and selection of appropriate architecture, routing algorithm, router micro-architecture and mapping techniques for on-chip communication has a key role in the design and implementation of the complete platform for NoC. This book contributes by presenting two simulation models and then applying these models on some proposed generic as well as application specific efficient, scalable and optimized architectures & routing algorithms for on-chip communication.

Product Specifications
SKU :COC91877
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-10-08
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