Call Us 080-41656200 (Mon-Sat: 10AM-8PM)
Free Shipping above Rs. 1499
Cash On Delivery*

Systolic Array Based Discrete Wavelet Transform


Marketed By :  LAP LAMBERT Academic Publishing   Sold By :  Kamal Books International  
Delivery in :  10-12 Business Days


Check Your Delivery Options

Rs. 3,651

Availability: In stock

  • Product Description

Now a days due to limitations in communication bandwidth there is more demand for compression in applications like multimedia communication, Television, Video Conferencing etc. This can be done by using DWT(Discrete Wavelet Transform) or DCT (Discrete Cosine Transform). DCT has poor reconstructed image when high compression is performed hence DWT is used. This book presents an implementation of DWT using Systolic architecture in VLSI .This architecture consist of Input delay unit, filter, register bank and control unit. This performs the calculation of high pass and low pass coefficients by using only one multiplier. This architecture has been simulated and implemented in VLSI. The hardware utilization efficiency is more compared to the referred due to FBRA Scheme. The systolic nature of this architecture corresponding to a clock speed of 115.9 MHz has its advantage in Optimizing area, time and power. The architecture is simple, modular, and cascadable for computation of one, or multi-dimensional DWT. Finally comparison of results of Systolic Array architecture and the lifting based architecture is done, which showed that prior is much faster.

Product Specifications
SKU :COC56802
AuthorJ. Hemanth,C. Chandra Sekhar and L. Rama Murthy
Number of Pages108
Publishing Year2012-10-15T00:00:00.000
Edition1 st
Book TypeElectronics & communications engineering
Country of ManufactureIndia
Product BrandLAP LAMBERT Academic Publishing
Product Packaging InfoBox
In The Box1 Piece
Product First Available On ClickOnCare.com2015-06-08 00:00:00