This thesis is presented 10 GHz voltage controlled ring oscillator for high speed application. The voltage controlled ring oscillator was designed and fabricated in 0.13μm CMOS technology. The oscillator is a 7-stages ring oscillator with one inverter that replaced by NAND-gate for shutting down in the ring oscillator during idle mode. seven-state inverter was used to control the 126 bit vector in ring oscillator. the transistor sizing was used to improve performance of the ring oscillator in PLL. In this project, layout of ring oscillator was designed and optimized as small as possible to be using L-EDIT software. The predicated performance is verified by analyses and simulation using H-spice and L-EDIT tools. This ring oscillator is optimized to compare with earlier design. The ring oscillator can operate with 1.8v supply voltage .